As one of techniques for mounting semiconductor devices on a circuit substrate, a flip chip mounting method has been known. In this method, bump electrodes are formed on a surface of a semiconductor chip on the same side that a functional element thereof is formed, and the bump electrodes are connected through an adhesive layer to input/output terminal electrodes arranged on a circuit substrate. In this method, the bump electrodes are formed of gold (Au), nickel (Ni) or the like by plating, and for an adhesive layer solder, conductive organic adhesive or the like is used. As the conductive organic adhesive, an anisotropic conductive film or paste, or the like is used besides an isotropic adhesive.
Although solder paste and isotropic conductive adhesive require little load for connection in packaging, an anisotropic conductive film and an anisotropic conductive paste are required to be loaded to at least 200 g per pin during packaging processes in order to secure stability of conductivity and reliability.
FIGS. 16A and 16B show an example of a conventional flip chip mounting technique using an anisotropic conductive resin film (see Isao Tsukagoshi et al; “Electronics Jisso Gijutsu”, 1997 March, p. 46-49, Gijutsu Chosakai Co., Ltd.). In this method, terminal electrodes of a semiconductor substrate are bonded to terminal electrodes of a circuit substrate by virtue of an anisotropic conductive resin film. The anisotropic conductive resin film contains epoxy resin conductive particles, such as Ni metal particles or Au-coated resin particles, as main ingredients of an adhesive. During assembly, the circuit substrate and the semiconductor device are heated under a load and the conductive resin film is interposed and pressed between the electrodes, so that the conductive particles in the resin film are brought into contact with one another to achieve electrical connections between all the electrodes facing each other.
Japanese Patent Publication 8-037206 discloses a method of semiconductor device packaging in which, as shown in FIGS. 17A to 17D, a conductive adhesive sheet 91 being in B-stage is interposed between dies 92, 92 and punched by a punch 93 (FIG. 17A) into small pieces 94 of the conductive adhesive sheet, each which is aligned with and bonded to a corresponding pad electrode 2 on a circuit substrate 1 so as to be used as an adhesive layer (FIG. 17B). On the other hand, ball bumps 73 are formed on electrode pads 61 of a semiconductor chip 5 (FIG. 17C). During mounting, the ball bumps 73 on the semiconductor chip 5 are heated and bonded to corresponding small pieces 94 of the conductive adhesive sheet on the circuit substrate 1 so that each of the ball bumps is connected to a corresponding electrode (FIG. 17D).
Japanese Patent Publication 10-199932 discloses a method for packaging a semiconductor device in which electrically conductive and plastically deformable bumps are formed on a large number of pad electrodes on a semiconductor chip, are leveled in a height direction, and are pressed against and bonded to corresponding pads on a circuit substrate. To bond, adhesive is applied to flat head planes of the leveled bumps which are joined to the corresponding pads.
In recent years, semiconductor devices have increasingly been required to be very compact, and to be capable of performance for use in portable electronic equipment. In order to fulfill these requirements, it is important that semiconductor devices to be mounted on, and interconnected with, circuit substrates should be provided with an increased number of pins for input/output terminals with a much smaller pitch between adjacent terminals, and that an area array of electrodes can be achieved in a zone where the electrodes can be arranged. This requires further development of techniques for achieving narrower-pitch connection.
An area array arrangement of electrodes has been established by conventional solder bump methods. A solder bump technique has advantages in that stresses acting on active elements on an integrated circuit chip during mounting are relatively small, thereby allowing the integrated circuit chip to sustain no damage. However, a diameter of solder bumps is so large that an electrode arrangement for mounting with area array arrangement has been limited to an electrode pitch of about 250 μm, if necessity of miniaturizing processes of substrates and package reliability are considered.
The above heat-press bonding technique using an anisotropic conductive adhesive has been noted from the viewpoint of production efficiency improvement for cost reduction, because productivity of a packaging process is expected to be higher than ever.
In the above heat-press bonding method using an anisotropic conductive resin film, by pressing the conductive resin film between each of bump electrodes on a semiconductor substrate and corresponding input/output terminal electrodes on a circuit substrate, conductive particles are brought into contact with one another to impart electrical conductivity between the bump electrodes on the semiconductor substrate and corresponding input/output terminal electrodes of the circuit substrate. For providing connection between the electrodes, a considerably large load between the electrodes during mounting is required to be, for example, not less than 200 g per bump electrode. This force may damage a semiconductor circuit or may cause failures, or breakage, of Al interconnections on the semiconductor substrate.
In packaging by using this method, the conductive resin in its entirety is cured while the semiconductor substrate is being pressed with a large force so as to be brought into direct contact with the input/output terminal electrodes of the substrate, so that stress occurring between electrodes facing each other produces residual stress within the semiconductor substrate, thereby reducing performance of a semiconductor circuit. In particular, pressure exerted on the bump electrodes at a time of mounting may cause the input/output terminal electrodes of the circuit substrate to be deformed into fracture during via hole filling of the substrate connected to the electrodes, resulting in faulty connections in the circuit substrate.
This may happen because, in a case of an anisotropic conductive resin, conductive particles contained in the anisotropic conductive resin and silica filled therein for controlling a thermal expansion coefficient can stress a surface on a side of a semiconductor functional part of the semiconductor substrate due to pressure during packaging.
In the packaging technique disclosed in Japanese Patent Publication No. 8-037206, there has been a problem in that bonding of a large number of ball bumps to adhesive layers reduces reliability because small pieces of a conductive sheet punched from a conductive adhesive sheet must be handled. While loads during packaging are partially applied only to the vicinity of the electrodes, thereby reducing damage to a semiconductor device, an increase in pressure for ensuring bonding may cause a risk with regard to destructing via holes beneath pad electrodes on a circuit substrate because bump electrodes apply pressure to the pad electrodes and stress the pad electrodes. Another problem is that the conductive adhesive sheet is very weak in terms of adhesive strength for joining the semiconductor device to the circuit substrate, thereby resulting in reducing reliability of a semiconductor package.
In the above method of Japanese Patent Publication No. 10-199932, adhesive is applied to tops of bumps on a semiconductor chip and then the bumps are joined to surfaces of pads, resulting in unevenness in height of the bumps which causes faulty bonding; therefore, in order to improve reliability of adhesion between all opposing electrodes, the bumps are required to be previously leveled in height. Though the bumps might be deformed so as to collapse and bonding could be thereby reinforced, there is a danger that such a deformation might result in damage to the semiconductor chip as described above.